Mixed alphameric-graphic display

ABSTRACT

An apparatus for providing a mixed alphanumerical and graphical display of coded data. The coded data is stored in a memory. Those data characters to be displayed graphically have an additional control bit stored with them. As the data is read from the memory for display, those characters accompanied by such a control bit are directed to a graphics logic unit, while those characters lacking the control bit are directed to a read-only memory. The outputs of these two components control a video signal generator which generates the necessary video signal for application to a display device such as a commercial television receiver.

United States Patent [72] Inventor David Ophlr Melville, N.Y. [2i] App].No. 70,674 [22] Filed Sept. 9, 1970 [45] Patented Nov. 30, i971 [73]Assignee Applied Digital Data Systems, Inc.

[54] MIXED ALPHAMERlC-GRAPHIC DISPLAY 7 Claims, 4 Drawing Figs.

[52] U.S. Cl 340/324 A, 315/18, 315/25, 340/154 [5!] Int.Cl G06l3/14[50] Field of Search 340/324 A, 154; 324/l2l; 3l5/l8, 25; 343/5 EM [561Relerenees Cited UNITED STATES PATENTS 3,076,120 1/1963 Matthews et al343/5 EM 3,l45 378 8/l964 Lyons 343/5 EM 3,] 82,308 5/l965 Dutton et al,343/5 EM 3.345,458 l0/l967 Cole etal i. 340/324AX 3,400,377 9/1968 Lee340/324 A X 3,474,438 Ill/I969 Lauher i. 340/324 A 3,5 37,096 l0/l970Hatfield... 340/324 A 3,543,269 ll/l970 Dudley 343/5 EM PrimaryExaminer-l0hn W, Caldwell Ass/slant Examlner- David L, TraftonAttorneys-John W. Behringer, Eugene Lv Bernard, James N Dresser, W.Brown Morton, Jr., Martin J Brown, John T Roberts, Morton, Bernard,Brown, Roberts and Sutherland and Malcolm L. Sutherland ABSTRACT: Anapparatus for providing a mixed alphanumerical and graphical display ofcoded data. The coded data is stored in a memory Those data charactersto be displayed graphically have an additional control bit stored withthem As the data is read from the memory for display, those charactersaccompanied by such a control bit are directed to a graphics logic unit,while those characters lacking the control bit are directed to aread-only memory. The outputs of these two components control a videosignal generator which generates the necessary video signal forapplication to a display device such as a commercial televisionreceiver.

DATA

SOURCE MEMORY msminnuvamen 3.624.632

' 1 5 HF GRAPHICS 3 R LOGIC om F UNlT VIDEO H souacs 24 5mm GENERATOR a4I I4 1 22 pk so CODE WA READ INTERPRETE MEMORY ONLY T MEMORY |2 2 s F/FR 0 40 N o 0 H01 M8 H02 F w um LINES CHARACTERS l-BO FIG 3 3 b4 RASTERLINES onvw ovum I 2 3 4 5 6 DOT POSlTlONS ATTORNEYS MIXEDALPHAMERIC-GRAPHIC DISPLAY The present invention pertains to a datadisplay device. More particularly. the present invention pertains toapparatus capable of providing a video display including both graphicaland alphanumeric display of data.

In numerous data processing operations it is desirable to be able toprovide a visable display of various data. it is frequently desired todisplay data generated by automatic data processing systems. Automatedaccounting systems, for example, frequently process voluminousaccounting information of large companies. in numerous operations it maybe desired to display such information rapidly to permit analysis andevaluation of the operation of the business. In many other applicationsof automatic data processing systems it is likewise desirable to be ableto rapidly display data stored within the processing system. While muchdata can be adequately displayed in an alphanumerical display in whichalphabetical and numerical characters are displayed, meaningfulinterpretation of some kinds of data can best be achieved if the data isdisplayed in graphical form. Mere graphs are not sufficient for suchdisplays, of course; alphanumerical legends must be provided with thegraphical displays to make such displays meaningful. Thus, optimumdisplay of data requires mixed displays including both alphanumericaland graphical presentation of data, and in the following specificationsuch displays are described as mixed displays The use of variouscathode-ray tube devices and other such display mechanisms permits therapid and economical display of data. Commercial television monitorshave recently come into use as output display devices for dataprocessing systems. Using such a television monitor, data can besimultaneously displayed in numerous widely separated locations. in thepast systems for display of data by means of such display devices havebeen limited to alphanumerical displays, although there have recentlybeen developed techniques for the graphical display of data ontelevision-type display devices. These graphical display techniques,however, have been limited solely to the graphical displays. To displaydata alphanumerically with such techniques, it has been necessary toform the alphanumerical display by graphical methods. This is a complexmethod for the development of alphanumerical displays and so isexpensive and thus undesirable.

The present invention is a system by means of which data can bedisplayed on a video display device in a mixed alphanumerical andgraphical display. The alphanumerical display is generated in fixedpatterns permitting optimum economical alphanumerical patterngeneration, while the graphical display is formed by a versitalgraphical technique adapted to permit the rapid formation of any desiredgraphical or pictorial display. Utilizing the present invention it isnot necessary to form the alphanumerical display by graphicaltechniques. Thus, more uniform alphanumerical displays are created whilemaking optimum use of alphanumerical pattern generation techniques,thereby permitting optimum and economical generation of such displays.

Data to be displayed in a mixed alphanumerical and graphical display isapplied to the apparatus of the present invention in coded form. A codeinterpreter determines whether particular data is to be displayedalphanumerically or graphically. Data to be displayed alphanumericallyis applied to a translator such as a read-only memory which converts thedata to alphanumerical control signals. Data to be displayed graphicallyis applied to a logic circuit which transforms it into graphical controlsignals. The two sets of control signals are applied to a video signalgenerator which converts them into the necessary video signal forapplication to the output display device.

These and other aspects and advantages of the present invention are moreapparent in the following detailed descrip tion and claims, particularlywhen considered in conjunction with the accompanying drawings. in thedrawings:

FIG. I is a block diagram of a data display system in accordance withthe present invention;

FIG. 2 is a diagram of an output display monitor suited for use in thepresent invention;

FIG. 3 is a representation of an alphanumerical display of a characterwhich might be provided on the display device of FIG. 2.

FIG. 4 is an enlarged view of one character space of the output displaymonitor of HO. 2.

In the apparatus of FIG. 1 data from a source it) is provided in codedform to the system of the present invention on line ll which applies thedata to code interpreter 12. Data source It] might be any source ofcoded data character signalsv In addition to the coded data charactersignals, source 10 applies to code interpreter l2 coded controlcharacter signals indicating whether particular data is to be displayedalphanumerically or graphically. Code interpreter l2 interprets thecoded character signals applied to it and transmits the coded datacharacter signals to memory 14 in which they are stored. When datasource It] applies a coded control character signal to code interpreter12, the code interpreter transmits a control signal to an appropriatecontrol circuit. While numerous control signals might be utilized in thepresent invention to control various features of the display of data,only those necessary to determine whether data is to be displayedalphanumerically or graphically are considered here. If a particular setof data is to be presented in a purely alphanumerical display, then datasource 10 sends to code interpreter 12 a signal indicating that thesystem is to operate in an alphanumerical mode. ln response to thissignal, code interpreter 12 applies a signal to the reset input ofbistable multivibrator or flip-flop 16. All subsequently displayed datais then displayed alphanumerically. if data is to be presented in amixed alphanumerical and graphical display, data source [0 sends to codeinterpreter 12 a signal indicating that the system is to operate in amixed mode, and in response thereto code interpreter [2 applies a signalto the set input of flip flop 16. While the system is operating in thismixed mode, data to be displayed graphically is preceded from datasource 10 by a graphical control command which causes code interpreter[2 to apply a signal to the set input of flip-flop l8, and data to bedisplayed alphanumerically is preceded from data source 10 by analphanumerical control command which causes code interpreter 12 to applya signal to the reset input of flip-flop 18. If desired the system couldbe constructed to operate only in the mixed mode, with flip-flop l6 andrelated circuitry omitted and with flip-flop l8 reset during what wouldbe alphanumerical mode operation.

The ONE output of flip-flop 16 is connected to the first input ofAND-gate 20, while the zero output of flip-flop 16 is connected to thefirst input of AND-gate 22. The data output from memory 14 is connectedto the second inputs of both AND-gate 20 and AND-gate 22, and thus whenthe system is operating in a mixed mode to provide mixed alphanumericaland graphical displays, the ONE output of flip-flop l6 enables AND-gate20 to pass the data from memory 14, and when the system is operating inan alphanumerical mode to provide only alphanumerical displays, the ZEROoutput of flip-flop l6 enables AND-gate 22 to pass the data from memory14. In the mixed mode, when data is to be displayed graphically,flip-flop 18 is set, and its ONE output applies a signal to memory 14.As a consequence of this, each multibit data character subsequentlystored in memory 14 has stored with it an additional bit which is acontrol bit, to indicate that the associated data character is to bedisplayed graphically. Conversely, when data is to be displayedalphanumerically, flip flop 18 is reset, and so no such control bit isstored with the associated multibit data characters subsequently storedin memory l4. When the system is in the graphical mode of operation withAND- gate 20 enabled, the data characters from memory 14 are ap pliedthrough gate 20 to the first input of AND-gate 24 and to thenoninhibiting input of lNHlBlTED-AND-gate 26. The control bits stored inmemory 14 with those data characters which are to be displayedgraphically are applied from memory [4 to the second input of AND-gate24 and to the inhibiting input of INHIBITED-AND-gate 26. Thus, in themixed mode, data which is to be displayed graphically passes fromAND-gate 20 through AND-gate 24 to graphics logic unit 28, while datawhich is to be displayed alphanumerically passes from AND-gate 20through lNI-IlBITED-AND-gate 26 and ORIgate 30 to read-only memory (ROM)32. In the alphanumerical mode with flip-flop I6 reset, all data passesthrough ANDgate 22 and OR-gate 30 to ROM 32.

Graphics logic unit 28 interprets the data signals applied to it and inresponse thereto generates the graphical pattern signals which form thebasis of the graphical output display. In like manner ROM 32 interpretsthe alphanumerical data signals and generates the alphanumerical patternsignals which form the basis of the alphanumerical output display. Thesepattern signals from graphics logic unit 28 and from ROM 32 are appliedthrough OR-gate 34 to video signal generator 36 in which they are mixedwith the necessary synchronization and other signals to form theappropriate video signal that is applied by output line 38 to displaydevice 40. Video signal generator 36 in addition generates the necessarytiming signals which not only are required by its output video signalbut which also are applied to code interpreter [2, memory 14, graphicslogic unit 28 and ROM 32 to synchronize operation of the system.

As a specific illustration of one preferred embodiment of the presentinvention, consider that output display device 40 is a commercialtelevision receiver operating. As depicted in FIG. 2, when such areceiver is operating in a noninterlaced mode, there are on its displayscreen 4l a total of 262% raster scan lines in its output display. Toensure against distortion of data on the output display, the 23uppermost and the 23 lowermost raster scan lines are not used, and so216 scan lines are available for data. These 2 I 6 scan lines can bedivided into 24 data lines, each having nine scan lines. Each scan lineis made up of 80 character positions, each of which is divided into sixdot positions.

Assume that the data from data source 10 is in the ASCII code which is awidely accepted data code utilizing seven data bits for the encoding ofeach data character. Details of the ASCII code can be found in numerouspublications such as United ROM of America Standards Institutepublication USAS X3.4-l968. entitled Standard Code for InformationExchange. published in I968. The following table presents the ASCIIcode:

Columns 0 and I of the ASCII code are nonprinting control charactersrather than data characters. These control characters can be utilizedfor the control commands from data source II] to code interpreter 12.Thus, for example. the command to shift the system to the mixed modemight be the SO control character 000i 1 l0. while the command to shiftthe system to the alphanumerical mode might be the SI control character0001 l l I. In the ASCII code these control characters are the "shiftout" and the "shift in" control commands, respectively. In accordancewith the ASCII definitions the "shift out" control character 000i I I0indicates that the coded characters which follow it are to beinterpreted as not being from the ASCII code. Thus, usage of this codedcharacter to indicate that the data characters following it is to bepresented graphically is in agreement with this ASCII definition.Likewise, by the ASCII definition the "shift in" control character 000iI ll indicates that coded characters following it are to be interpretedaccording to the ASCII code, and so use of this ASCII control command toindicate that data characters following it are to be presentedalphanumerically in accordance with the ASCII code is in agreement withthis ASCII definition. With the system operating in the mixedalphanumerical and graphical mode, any ASCII control character notrequired for another specific function can be used to indicate whichdata characters are to be displayed alphanumerically and which are to bedisplayed graphically. Thus, for example, two of the ASCII codeinformation separators GS, RS, and US might be used for these controlcommands. Likewise. any other unused control characters could beutilized for this purpose. Code interpreter I2 senses the controlcommands and in response thereto applies the necessary signals to thedifferent inputs of flipllops I6 and 18. Data characters are likewisesensed by code interpreter I2 and are applied to the data input ofmemory 14, Video signal generator 36 applies the data line number andthe character number to memory 14. Code interpreter 12 can be any set ofgates capable of properly sensing the signals applied to it from datasource I0. It is to be noted that in accordance with the ASCII code,each character having a zero for both bits six and seven is a controlcharacter which thus is applied by code interpreter IIIUIIR J 12 toeither flip-flop 16 or flip-flop I8 or to some other control deviceshould additional control features be provided.

Columns 2, 3, 4 and 5 ol the above ASCII code table are referred to asthe dense ASCII subset. These columns include all of the upper casealphabet, the numerals 0 through 9, and the most used punctuation andother symbols. Thus, while the present invention can be utilized toprovide an alphanumerical display of the full ASCII code, a savings canbe achieved without undue loss by limiting the display to the denseASCII subset. Note that in every coded character in the dense ASCIIsubset the sixth bit is the opposite of the seventh bit; i.e., in thosecoded characters from the dense ASCII subset which have a zero for thesixth bit, the seventh bit is a one, and viceversa. Hence, within thedense ASCII subset, each data character is uniquely defined by a six-bitcoded character. Consequently, if the system is limited to display ofthe dense ASCII subset, code interpreter 12 needs to transmit to memoryI4 only bits one through six of each coded character received from datasource 10.

With the system operating in the mixed mode, when data from source 10has been preceded by a control character indicating that the data is tobe displayed alphanumerically, code interpreter 12 causes flip-flop I8to be reset so that the data is stored in memory I4 without the extracontrol bit. Consequently, when that data is read from memory I4,AND-gate 24 is blocked, and INHIBITED-AND-gate 26 is not inhibited. Thedata from memory 14 therefore passes through gates 20, 26 and 30 to ROM32 which interprets the data in accordance with the dense ASCII subset.ROM 32 receives the scan line number and the dot position number fromcounters within video signal generator 36, and from these numbers andfrom the data character, ROM 32 generates alphanumerical pattern signalsthat are transmitted through OR-gate 34 to video signal generator 36.

Video signal generator 36 generates a video signal including the six-bitposition signals for the designated scan line of the designated datacharacter. Thus, for example, if it is desired to display thealphanumerical character A depicted in FIG. 3, ROM 32 generates for thefirst scan line of that data character the alphanumerical pattern signalOOIOOO, and in response to that signal and to the synchronizationsignals generated within video signal generator 36, the video signalgenerator applies to output line 38 a video signal to cause displaydevice 40 to produce the first scan line of the alphanumerical characterA as shown in FIG. 3. Generally, the video display will consist oftotally blanked and totally unblanked areas, and so the video signaloutput from video signal generator 36 includes twostate blank andunblank signals mixed with the necessary vertical and horizontalsynchronization signals. Thus, in response to this alphanumericalpattern signal 001000, video signal generator 38 generates a videosignal for the first scan line of mun the designated character locationon display screen 4] which causes dot positions one, two, four, five andsix to be blanked while dot position three is unblanked. Should thereverse background be desired on display screen 41, then the videosignal causes dot positions one, two, four, five and six to be unblankedwhile dot position three is blanked. If, of course, a representation ofthe alphanumerical character A different from that depicted in FIG. 3 isdesired, the appropriate alphanumerical pattern signal is generated byROM 32. It will be noted that the display of FIG. 3 utilizes sevenraster lines and five dot positions of the nine raster lines and six dotpositions in the character space. The remaining two raster lines and onedot position provide interline and intercharacter spacing.

When a control character from data source It) has placed the system inthe alphanumerical mode so that data read from memory I4 passes throughgates 22 and 30 to ROM 32, the data is treated in the same manner by ROM32 and video signal generator 36. Thus, the coded data characters areinterpreted by ROM 32 in accordance with the dense ASCII subset togenerate an alphanumerical pattern signal which is applied to videosignal generator 36 to generate the appropriate video signal forapplication by system output line 38 to display device 40.

In the mixed mode, when data source 10 has applied to code interpreter12 a control character indicating that subsequent data characters are tobe displayed graphically, code interpreter 12 sets flip-flop l8 and eachof those subsequent data characters is stored in memory I4 together withan extra control bit which indicates that those data characters are tobe displayed graphically. When those data characters are read frommemory 14, the control bit inhibits INHIBlTED-AND gate 26 and enablesAND-gate 24. Consequently, those data characters pass from memory 14through gates 20 and 24 to graphics logic unit 28 which in responsethereto generates a graphical pattern signal. The coded data charactersfrom data source II) which result in graphical displays are in a six-bitcode, just as are the coded data characters which result inalphanumerical displays of the dense ASCII subset. FIG. 4 depicts atypical character position on the display screen 4| made up on ninehorizontal raster scan lines, each including six dot positions. Asdepicted in FIG. 4, each character position is divided into six bitspaces, hl through b6. Each of the bit spaces bI-b6 is three scan lineshigh and three dot position wide. Rather than interpreting the codedcharacters in accordance with the dense ASCII subset, the codedcharacters are interpreted to indicate whether the respective six-bitspaces bl through b6, depicted in FIG. 4, of the corresponding characterposition are to be blanked or unblanked on output display device 40.Thus, for example, the six-bit code can be interpreted by graphics logicunit 28 in accordance with the following graphics subset:

The data characters from memory 14 which are to be displayed graphicallyare interpreted by graphics logic unit 28 in accordance with thisgraphics subset, and so graphics logic unit 28 applies a graphicalpattern signal through OR-gate 34 to video signal generator 36 to causethe video signal genera tor to apply to output line 38 a video signalincluding two-state blank and unblank signals mixed with the necessaryvertical and horizontal synchronization signals to generate the patternsof the above graphical subset. Graphics logic unit 28 receives fromvideo signal generator 36 the raster line number and the dot positionnumber to synchronize generation of the graphical pattern signals. Notethat, as shown in FIG. 4. each bit position bl--b6 of the characterposition includes three dot positions on each of three raster lines.Thus. for example. if a display is to have blanked alphanumerical andgraphical characters on an unblanked background. the coded character l[0101 would graphically generate an L-shaped pattern having blanked dotpositions one, two and three on each of raster lines one through six anddot positions one through six on each of raster lies seven through nine,with dot positions four, five and six on each of raster lines onethrough six unblanked. As can be seen from the above graphical subset.the blanked areas are contiguous. Thus, using the above graphicalsubset, continuous. unbroken graphical lines can be generated inaccordance with the present invention, and so a flexible graphicaldisplay capability is achieved. If desired for a particular application,a bit space which is to be blanked can have fewer than all nine dotpositions blanked in response to the data characters from memory 14.Thus, for example. in the three raster line by three dot position bitposition. only centermost the dot space might be blanked Alternatively,the four dot spaces defined by the intersection of the top two rasterlines and left two dot positions of each bit position (e.g. dotpositions one. two. four and five of raster lines one, two, four five.seven and eight) might be blanked. Numerous other such patterns, ofcourse. could be utilized.

Memory 14 can be any memory having nondestructive read out and havingsufficient capacity to hold the maximum number of data characters whichit is desired to display. Thus, if the display is to have a maximumcapability of 24 display lines. each with character positions, thememory 14 must have a capacity of 1,920 seven-bit characters (six databits and a control bit per character). The data characters stored withinthe memory 14 are then sequentially read out to gates 20 and 22, whilethe control bits are sequentially applied to gates 24 and 26.

The data bits in the data characters applied from data source 10 to codeinterpreter 12 can be applied either serially or in parallelv If thedata is applied serially, code interpreter 12 preferably converts thedata to parallel for application to memory 14.

Although the above description of one preferred embodiment of thepresent invention has been with reference to the normal commercialtelevision raster pattern in which the display is raster scannedhorizontally one raster line at a time. other scanning techniques couldbe utilized. Thus, for example, a subraster scanning technique might beused in which each display line is raster scanned by a horizontalscanning signal modulated with a sinusoidal sweep signal to sweep thescan vertically over the full character height during each display lineraster scan. As other alternatives, :1 vertical raster scan could beutilized or a vertical subraster scan in which each vertical characterlocation is raster scanned by a signal that is modulated by a sinusoidalsweep signal to horizontally sweep the scan over the full characterwidth. Likewise. while a nine raster line by six dot position characterspace has been described, other sizes could be utilized. It is to benoted that once the coded data characters have been applied from datasource [0 to memory 14. signals are no longer required from data source10, and the system continues to display the static data within memory14. Should a change in that data be made. data source It) simply appliesthe new data characters through code interpreter 12 to memory 14, thusgiving a dynamic capability. Accordingly display line numbers andcharacter numbers are provided to code interpreter 12 from video signalgenerator 36 to synchronize this data input function.

Any of numerous display mechanisms could be utilized as a display device40, Thus, for example, instead ofa commercial television receiver, astandard cathode-ray tube could be utilized with both X and Y deflectionvoltages applied to it Likewise, a stored image cathode-ray tube, notrequiring frequent image refreshing, could be utilized, in which eventmemory (14) need not have a nondestructive readout. Other possibledisplay devices include plasma screens, light-emitting diodes. andtungsten light bulb patterns. These various display devices are thusreferred to as video display devices. It is thus seen that although thepresent invention has described with reference to preferred embodiments,numerous modifications and rearrangements could be made, and still theresult would be within the scope of the invention.

What is claimed is:

l. Apparatus for generating from a plurality of coded input charactersignals. including coded input data character signals and coded inputcontrol character signals, a video output signal for application to avideo display device to provide a mixed alphanumerical and graphicaldisplay of the input data characters encoded in the coded input datacharacter signals, said apparatus comprising:

a. memory means for storing coded input data character signals;

first generating means for generating from said coded input datacharacter signals a graphical pattern signal;

c. second generating means for generating from said coded input datacharacter signals an alphanumerical pattern signal;

. first control means coupled to said memory means, to said firstgenerating means and to said second generating means and capablealternatively of assuming a first state in which coded input datacharacter signals from said memory means pass through said first controlmeans to said first generating means and of assuming a second state inwhich coded input data character signals from said memory means passthrough said first control means to said second generating means;

. input code interpreting means for receiving from a data source codedinput character signals including coded input data character signals andcoded input control character signals and for directing coded input datacharacter si na ls to said memory means for storage wherein an directingcoded input control character f. video signal generator means coupled tosaid first generating means and to said second generating means forgeneratinga video signal, in response to the graphical pattern signaland the alphanumerical pattern signal, the video signal includingsynchronization components, said video signal generator means applyingthe video signal to an output line for application to a video displaydevice, said video signal generator further generating timing signalsfor application within the apparatus to synchronize operation thereof.

2. Apparatus as claimed in claim 1 in which the coded input datacharacter signals are multibit binary coded signals and in which saidfirst control means includes:

means for applying to said memory means in one of the first and secondstates a control bit for storage in conjunction with an associated inputdata character signal; and

gate means responsive to presence of a control bit in as sociation withan input data character signal stored within said memory means forapplying that input data character signal to a first one of said firstand second generating means, said gate means further responsive toabsence ofa control bit in association with another input data charactersignal stored within said memory means for applying that other inputdata character signal to the other one of said first and secondgenerating means.

3. Apparatus as claimed in claim 2 further comprising second controlmeans coupled to said input code interpreter means. to said memorymeans, to said first control means and to said second generating means,said second control means capable alternatively of assuming a firststate in which coded input data character signals from said memory meanspass through said second control means to said first control means andof assuming a second state in which coded input data character signalsfrom said memory means pass through said second control means to saidsecond generating means, said input code interpreter means directingselected coded input control character signals to said second controlmeans to cause said second control means to assume one of its two statesin response thereof.

4. Apparatus as claimed in claim I further comprising a video displaydevice connected to said video signal generator output line forproviding a video display of video signals applied thereto.

5. Apparatus as claimed in claim 4 in which said video display device isa television receiver.

6. Apparatus as claimed in claim I further comprising a source of codedinput character signals.

7. Apparatus as claimed in claim I in which one of said first and secondgenerating means is a read-only memory.

UNITED STATES PATENT OFFICE CERTIFICATE OF C(JRRECTION Patent N3,524,632 Dated November 30 1971 Inventor(s) avld Ophlr It is certifiedthat error appears in the above-identified patent and that said LettersPatent are hereby corrected as shown below:

Column 3, line 38, "ROM" should read States Column 8, line 20, "lies"should read lines Column 9, line 47, "wherein" should read thereinColumn 10 line 50, insert claim 8:

8. Apparatus as claimed in claim 1 in which the coded input charactersignals are coded in ASCII code and said first generating meansgenerates a graphical pattern signal in response to ASCII coded signalsand said g second generating means generates an alphanumerical patternsignal in response to ASCII coded signals.

Signed and Scaled this Eighteenth Day Of October 1977 [SEAL] Arrest:

RUTH c. MASON LUTRELLE F. PARKER Arresting Ofll'cer Acting Commissionerof Patents and Trademarks

1. Apparatus for generating from a plurality of coded input charactersignals, including coded input data character signals and coded inputcontrol character signals, a video output signal for application to avideo display device to provide a mixed alphanumerical and graphicaldisplay of the input data characters encoded in the coded input datacharacter signals, said apparatus comprising: a. memory means forstoring coded input data character signals; b. first generating meansfor generating from said coded input data character signals a graphicalpattern signal; c. second generating means for generating from saidcoded input data character signals an alphanumerical pattern signal; d.first control means coupled to said memory means, to said firstgenerating means and to said second generating means and capablealternatively of assuming a first state in which coded input datacharacter signals from said memory means pass through said first controlmeans to said first generating means and of assuming a second state inwhich coded input data character signals from said memory means passthrough said first control means to said second generating means; e.input code interpreting means for receiving from a data source codediNput character signals including coded input data character signals andcoded input control character signals and for directing coded input datacharacter signals to said memory means for storage wherein and directingcoded input control character signals to said first control means tocause said first control means to assume one of its two states inresponse thereto; and f. video signal generator means coupled to saidfirst generating means and to said second generating means forgenerating a video signal, in response to the graphical pattern signaland the alphanumerical pattern signal, the video signal includingsynchronization components, said video signal generator means applyingthe video signal to an output line for application to a video displaydevice, said video signal generator further generating timing signalsfor application within the apparatus to synchronize operation thereof.2. Apparatus as claimed in claim 1 in which the coded input datacharacter signals are multibit binary coded signals and in which saidfirst control means includes: means for applying to said memory means inone of the first and second states a control bit for storage inconjunction with an associated input data character signal; and gatemeans responsive to presence of a control bit in association with aninput data character signal stored within said memory means for applyingthat input data character signal to a first one of said first and secondgenerating means, said gate means further responsive to absence of acontrol bit in association with another input data character signalstored within said memory means for applying that other input datacharacter signal to the other one of said first and second generatingmeans.
 3. Apparatus as claimed in claim 2 further comprising secondcontrol means coupled to said input code interpreter means, to saidmemory means, to said first control means and to said second generatingmeans, said second control means capable alternatively of assuming afirst state in which coded input data character signals from said memorymeans pass through said second control means to said first control meansand of assuming a second state in which coded input data charactersignals from said memory means pass through said second control means tosaid second generating means, said input code interpreter meansdirecting selected coded input control character signals to said secondcontrol means to cause said second control means to assume one of itstwo states in response thereof.
 4. Apparatus as claimed in claim 1further comprising a video display device connected to said video signalgenerator output line for providing a video display of video signalsapplied thereto.
 5. Apparatus as claimed in claim 4 in which said videodisplay device is a television receiver.
 6. Apparatus as claimed inclaim 1 further comprising a source of coded input character signals. 7.Apparatus as claimed in claim 1 in which one of said first and secondgenerating means is a read-only memory.